TPS24711DGSR【PDF 24/34 页】IC CTRLR HOT SWAP 2.5-18V 10MSOP

=

+

=

ON

=

2

OUT

VCC(MAX)

OUT

VCC(MAX)

OUT

LIM

LIM LIM

VCC(MAX)

2

LIM

C

V

C

V

C

P

if P

I

V

2 P

I

2 I

?/DIV>

+

-

<

?/DIV>

OUT

VCC(MAX)

LIM LIM

VCC(MAX)

LIM

C

V

if P

I

V

I

?/DIV>

>

?/DIV>

( )

2

ON

2

herefore,

470 F 12 V

470 F 29.3 W

470 F 12 V

0.614 ms

2 29.3 W

12 A

2 12 A

?/DIV>

=

+

-

=

?/DIV>

TPS24710,TPS24711

TPS24712,TPS24713

SLVSAL2E JANUARY 2011REVISED NOVEMBER 2013

www.ti.com

STEP 4. Choose Output Voltage Rising Time, t

ON

, C

T

The maximum output voltage rise time, t

ON

, set by the timer capacitor C

T

must suffice to fully charge the load

capacitance C

OUT

without triggering the fault circuitry. Equation 10 defines t

ON

for two possible inrush cases.

Assuming that only the load capacitance draws current during start-up,

(10)

The next step is to determine the minimum fault-timer period. In Equation 10, the output rise time is t

ON

. This is

the amount of time it takes to charge the output capacitor up to the final output voltage. However, the fault timer

uses the difference between the input voltage and the gate voltage to determine if the TPS24710/11/12/13 is still

in inrush limit. The fault timer continues to run until V

GS

rises 5.9 V (for V

VCC

= 12 V) above the input voltage.

Some additional time must be added to the charge time to account for this additional gate voltage rise. The

minimum fault time can be calculated using Equation 11,

(11)

where C

ISS

is the MOSFET input capacitance and I

GATE

is the minimum gate sourcing current of

TPS24710/11/12/13, or 20 糀. Using the example parameters in Equation 11 and the CSD16403Q5 data sheet

(SLPS201) leads to a minimum fault time of 1.22 ms. This time is derived considering the tolerances of C

OUT

,

C

ISS

, I

LIM

, P

LIM

, I

GATE

, and V

VCC(MAX)

. The fault timer must be set to a value higher than 1.22 ms to avoid turning

off during start-up, but lower than any maximum fault time limit determined by the SOA curve (see Figure 35)

derated for operating junction temperature.

For this example, select 7 ms to allow for variation of system parameters such as temperature, load, component

tolerance, and input voltage. The timing capacitor is calculated in Equation 4 as 52 nF. Selecting the next-highest

standard value, 56 nF, yields a 7.56-ms fault time (see Equation 12).

(12)

24

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